Postgraduate Course: Digital Systems Laboratory (MSc) (PGEE11117)

Course Outline
School	School of Engineering	College	College of Science and Engineering
Credit level (Normal year taken)	SCQF Level 11 (Postgraduate)	Availability	Not available to visiting students
SCQF Credits	10	ECTS Credits	5
Summary	The laboratory aims to produce students who are capable of developing hardware-software digital systems from high level functional specifications and prototyping them on to FPGA hardware using a standard hardware description language and software programming language.
Course description	Laboratory exercise designed to teach Embedded Digital System Design, Embedded Processor Programming, Verilog Hardware Description Language, Data Path design and Control Path design through the completion of successive design tasks.

Entry Requirements (not applicable to Visiting Students)
Pre-requisites		Co-requisites
Prohibited Combinations		Other requirements	None
Additional Costs	Purchase of laboratory notebook

Course Delivery Information

Academic year 2019/20, Not available to visiting students (SS1)		Quota: 46
Course Start	Semester 2
Timetable	Timetable
Learning and Teaching activities (Further Info)	Total Hours: 100 ( Supervised Practical/Workshop/Studio Hours 30, Formative Assessment Hours 1, Summative Assessment Hours 10, Programme Level Learning and Teaching Hours 2, Directed Learning and Independent Learning Hours 57 )
Assessment (Further Info)	Written Exam 0 %, Coursework 100 %, Practical Exam 0 %
Additional Information (Assessment)	Coursework %: 100
Feedback	Not entered
No Exam Information

Learning Outcomes
On completion of this course, the student will be able to: Data paths and Control paths and number of ways of designing them. Ability to use and choose between different techniques Ability to use a commercial digital system development tool suite Ability to evaluate implementation results Instruction-set based control path design