| 
 Postgraduate Course: Digital Systems Laboratory (MSc) (PGEE11117)
Course Outline
| School | School of Engineering | College | College of Science and Engineering |  
| Credit level (Normal year taken) | SCQF Level 11 (Postgraduate) | Availability | Not available to visiting students |  
| SCQF Credits | 10 | ECTS Credits | 5 |  
 
| Summary | The laboratory aims to produce students who are capable of developing hardware-software digital systems from high
 level functional specifications and prototyping them on to
 FPGA hardware using a standard hardware description
 language and software programming language.
 |  
| Course description | Laboratory exercise designed to teach Embedded Digital System Design, Embedded Processor Programming, Verilog
 Hardware Description Language, Data Path design and
 Control Path design through the completion of successive
 design tasks.
 |  
Entry Requirements (not applicable to Visiting Students)
| Pre-requisites |  | Co-requisites |  |  
| Prohibited Combinations |  | Other requirements | None |  
| Additional Costs | Purchase of laboratory notebook |  
Course Delivery Information
|  |  
| Academic year 2017/18, Not available to visiting students (SS1) | Quota:  21 |  | Course Start | Semester 2 |  Timetable | Timetable | 
| Learning and Teaching activities (Further Info) | Total Hours:
100
(
 Supervised Practical/Workshop/Studio Hours 30,
 Formative Assessment Hours 1,
 Summative Assessment Hours 10,
 Programme Level Learning and Teaching Hours 2,
Directed Learning and Independent Learning Hours
57 ) |  
| Assessment (Further Info) | Written Exam
0 %,
Coursework
100 %,
Practical Exam
0 % |  
 
| Additional Information (Assessment) | Coursework %: 100 |  
| Feedback | Not entered |  
| No Exam Information |  
Learning Outcomes 
| 1. Knowledge and understanding of: I. Data paths and Control paths;
 II. Design options in the design of Data paths and Control
 paths.
 II. Instruction-set based Control path design;
 III. Control and Data path integration;
 IV. Design capture of hardware-software digital systems in a
 standard hardware description language.
 2. Intellectual:
 I. Ability to use and choose between different techniques for
 digital system design and capture;
 II. Ability to evaluate implementation results (e.g. speed,
 area, power) and correlate them with the corresponding high
 level design and capture.
 3. Practical:
 I. Ability to use a commercial digital system development
 tool suite to develop a hardware-software digital system and
 prototype them on to FPGA hardware.
 |  
Additional Information
| Graduate Attributes and Skills | Not entered |  
| Keywords | Embedded Digital System Design Embedded Processor Programming Hardware Description Language Verilog |  
Contacts 
| Course organiser | Dr Alister Hamilton Tel: (0131 6)50 5597
 Email:
 | Course secretary | Miss Megan Inch Tel: (0131 6)51 7079
 Email:
 |   |  © Copyright 2017 The University of Edinburgh -  6 February 2017 8:57 pm |