Postgraduate Course: Digital Systems Laboratory (MSc) (PGEE11117)
Course Outline
| School | School of Engineering |
College | College of Science and Engineering |
| Course type | Standard |
Availability | Not available to visiting students |
| Credit level (Normal year taken) | SCQF Level 11 (Postgraduate) |
Credits | 10 |
| Home subject area | Postgrad (School of Engineering) |
Other subject area | None |
| Course website |
None |
Taught in Gaelic? | No |
| Course description | The laboratory aims to produce students who are capable of
developing hardware-software digital systems from high
level functional specifications and prototyping them on to
FPGA hardware using a standard hardware description
language and software programming language. |
Entry Requirements (not applicable to Visiting Students)
| Pre-requisites |
|
Co-requisites | |
| Prohibited Combinations | |
Other requirements | None |
| Additional Costs | Purchase of laboratory notebook |
Course Delivery Information
|
| Delivery period: 2014/15 Semester 2, Not available to visiting students (SS1)
|
Learn enabled: Yes |
Quota: 18 |
|
Web Timetable |
Web Timetable |
| Course Start Date |
12/01/2015 |
| Breakdown of Learning and Teaching activities (Further Info) |
Total Hours:
100
(
Supervised Practical/Workshop/Studio Hours 30,
Programme Level Learning and Teaching Hours 2,
Directed Learning and Independent Learning Hours
68 )
|
| Additional Notes |
|
| Breakdown of Assessment Methods (Further Info) |
Written Exam
0 %,
Coursework
100 %,
Practical Exam
0 %
|
| No Exam Information |
Summary of Intended Learning Outcomes
1. Knowledge and understanding of:
I. Data paths and Control paths;
II. Design options in the design of Data paths and Control
paths.
II. Instruction-set based Control path design;
III. Control and Data path integration;
IV. Design capture of hardware-software digital systems in a
standard hardware description language.
2. Intellectual:
I. Ability to use and choose between different techniques for
digital system design and capture;
II. Ability to evaluate implementation results (e.g. speed,
area, power) and correlate them with the corresponding high
level design and capture.
3. Practical:
I. Ability to use a commercial digital system development
tool suite to develop a hardware-software digital system and
prototype them on to FPGA hardware. |
Assessment Information
| Coursework %: 100 |
Special Arrangements
| None |
Additional Information
| Academic description |
Not entered |
| Syllabus |
Laboratory exercise designed to teach Embedded Digital
System Design, Embedded Processor Programming, Verilog
Hardware Description Language, Data Path design and
Control Path design through the completion of successive
design tasks. |
| Transferable skills |
Not entered |
| Reading list |
Not entered |
| Study Abroad |
Not entered |
| Study Pattern |
Not entered |
| Keywords | Embedded Digital System Design Embedded Processor Programming Hardware Description Language Verilog |
Contacts
| Course organiser | Dr Alister Hamilton
Tel: (0131 6)50 5597
Email: Alister.Hamilton@ed.ac.uk |
Course secretary | Mrs Sharon Potter
Tel: (0131 6)51 7079
Email: Sharon.Potter@ed.ac.uk |
|
© Copyright 2014 The University of Edinburgh - 29 August 2014 4:28 am
|
University Homepage