Undergraduate Course: Digital System Design 4 (ELEE10007)
Course Outline
School | School of Engineering |
College | College of Science and Engineering |
Credit level (Normal year taken) | SCQF Level 10 (Year 4 Undergraduate) |
Availability | Available to all students |
SCQF Credits | 10 |
ECTS Credits | 5 |
Summary | This course is lecture based and is taken by students in the forth year of electronics and electrical engineering degrees in Semester 2. It comprises one 22 lecture module with 8 tutorials. It is assessed 100% by examination. The course covers: Computer Architecture ( from a hardware perspective); Components of Computers; Microprocessor Design; and Parallel Computing Architectures |
Course description |
Not entered
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Information for Visiting Students
Pre-requisites | Students should be familiar with combinational and sequential logic circuit design, understand and be able to design state machines. They should also understand datapaths and be familiar with the associated arithmetic circuits. |
High Demand Course? |
Yes |
Course Delivery Information
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Academic year 2023/24, Available to all students (SV1)
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Quota: None |
Course Start |
Semester 2 |
Timetable |
Timetable |
Learning and Teaching activities (Further Info) |
Total Hours:
100
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Lecture Hours 22,
Seminar/Tutorial Hours 8,
Formative Assessment Hours 1,
Summative Assessment Hours 2,
Programme Level Learning and Teaching Hours 2,
Directed Learning and Independent Learning Hours
65 )
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Assessment (Further Info) |
Written Exam
100 %,
Coursework
0 %,
Practical Exam
0 %
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Additional Information (Assessment) |
2 hour Examination, Questions: 1 in Section A (20 marks), 2 from 3 in Section B (20 marks each), 60 marks total. |
Feedback |
Not entered |
Exam Information |
Exam Diet |
Paper Name |
Hours & Minutes |
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Main Exam Diet S2 (April/May) | | 2:00 | |
Learning Outcomes
On completion of this course, the student will be able to:
- Understand different types of computer and evaluate processor performance in terms of: CPU time, instruction count, CPI, benchmarks, power consumption and cost effectiveness.
- Understand the Instruction Set Architecture and MIPS assembly language.
- Understand the processor architecture, datapath, and hazards, and discern the differences between the single-cycle datapath and pipelined datapath.
- Understand the organisation of memory and caches, including virtual memory systems
- Evaluate the performance improvements from parallel computing architectures.
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Reading List
Essential:
"Computer Organization and Design: The Hardware/Software Interface", D.A. Patterson and J.L. Hennesey, 5th Edition (MIPS), Morgan Kaufmann, 2013
ISBN: 978-0124077263
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Additional Information
Graduate Attributes and Skills |
Not entered |
Keywords | Not entered |
Contacts
Course organiser | Dr Chang Liu
Tel: (0131 6)50 2563
Email: |
Course secretary | Mrs Megan Inch-Kellingray
Tel: (0131 6)51 7079
Email: |
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