Undergraduate Course: Computer Design (INFR09046)
Course Outline
| School | School of Informatics |
College | College of Science and Engineering |
| Credit level (Normal year taken) | SCQF Level 9 (Year 3 Undergraduate) |
Availability | Available to all students |
| SCQF Credits | 20 |
ECTS Credits | 10 |
| Summary | This course provides an introduction to the fundamental concepts of the different ways computers can be analysed and designed. The course does not look at the differences between machines with different types of instruction set, nor does it cover design techniques for extracting maximum performance from computers - these aspects of computer hardware are covered in the Computer Architecture course. The issues and techniques covered in the Computer Design course are relevant to the design of all computers, regardless of their particular architecture.
The course is partitioned into three sections. The short first section revises the design of combinational and sequential logic. The second section demonstrates how to analyse and design systems of the complexity of a simple CPU or I/O controller. The third section of the course covers the design of a complete computer capable of executing assembly code programs and different control strategies for performing I/O.
This 20 credit course replaces INFR09010 Computer Design (10 credits). |
| Course description |
Logic Design Revision Simple combinational logic design to state machines for sequential circuits.
Processor Design Data path and control. Fixed program controllers: example and design procedure. Instruction set processors: data path design, simple control, microprogrammed control. ALU design: addition, ripple carry and look ahead adders, negative numbers & subtraction; multiplication sequential multiplier, modification for 2's complement, combinational multiplier, division. Floating point numbers: addition, multiply and divide, implementations.
Computer Systems Memory: Byte vs. word addressing, memory system design, error detection and correction. I/O Design: I/O controller design. Connection of I/O controllers to CPU, synchronization of I/O and CPU, polling, interrupts. Direct Memory Access, bus arbitration, DMA controller implementation. I/O processors. Synchronous and asynchronous buses. Simple performance enhancements to the basic architecture. RISC.
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Entry Requirements (not applicable to Visiting Students)
| Pre-requisites |
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Co-requisites | |
| Prohibited Combinations | Students MUST NOT also be taking
Computer Design (INFR09010)
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Other requirements | This course is open to all Informatics students including those on joint degrees. For external students where this course is not listed in your DPT, please seek special permission from the course organiser (lecturer). |
Information for Visiting Students
| Pre-requisites | Visiting students are required to have comparable background to that assumed by the course prerequisites listed in the Degree Regulations & Programmes of Study. If in doubt, consult the course organiser (lecturer). |
| High Demand Course? |
Yes |
Course Delivery Information
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| Academic year 2017/18, Available to all students (SV1)
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Quota: None |
| Course Start |
Semester 1 |
Timetable |
Timetable |
| Learning and Teaching activities (Further Info) |
Total Hours:
200
(
Lecture Hours 22,
Supervised Practical/Workshop/Studio Hours 24,
Summative Assessment Hours 2,
Programme Level Learning and Teaching Hours 4,
Directed Learning and Independent Learning Hours
148 )
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| Assessment (Further Info) |
Written Exam
60 %,
Coursework
40 %,
Practical Exam
0 %
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| Additional Information (Assessment) |
Written Exam 60 %, Coursework 40 %, Practical Exam 0 %
1 formative assessment (formative feedback)
3 summative assessments (40% of course total)
1 exam (60% of course total). |
| Feedback |
There are 3 laboratory assignments, all of which culminate in a summative assessment. Formative feedback is given during laboratory sessions through direct one-to-one discussions between the lecturer (or the demonstrator) and the students. |
| Exam Information |
| Exam Diet |
Paper Name |
Hours & Minutes |
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| Main Exam Diet S1 (December) | | 2:00 | |
Learning Outcomes
On completion of this course, the student will be able to:
- Build state machines to implement a circuit or system to a specification.
- Interconnect circuits for systems of higher complexity, specifically up to the complexity of the components required in a simple computer processor datapath.
- Analyse and synthesise circuits to control and sequence the flow of data within a simple CPU or microcontroller, and between a simple CPU, memory systems and input/output device controllers.
- Design and implement a microprogrammed controller for a given simple cpu architecture.
- Gain familiarity with: design and simulation software; designing systems with Verilog HDL; programming designs into a large field-programmable gate array device (FPGA); using an assembly language to implement a design in a programmable microcontroller.
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Reading List
* V. C. Hamacher, Z. G. Vranesic & S. G. Zaky, 'Computer Organization', 5th edition, McGraw-Hill, 2001. Covers almost all the syllabus (and more). Similar in approach to the lectures.
* D. A. Patterson & J. L. Hennessy, 'Computer Organization & Design: The Hardware/Software Interface', 2nd edition, Morgan Kaufmann, 1998. A different view of most of the material in the syllabus, and a lot of interesting stuff.
* M. M. Mano, 'Digital Design', 2nd edition, Prentice-Hall, 1991. A very good book on logic design, with much more coverage of that part of the syllabus than the previous two books.
* A. S. Tanenbaum, 'Structured Computer Organization', 4th edition, Prentice-Hall, 1999. More a CS2 level book, but worth referring to. |
Contacts
| Course organiser | Prof Nigel Topham
Tel: (0131 6)50 5122
Email: |
Course secretary | Mrs Victoria Swann
Tel: (0131 6)51 7607
Email: |
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