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DEGREE REGULATIONS & PROGRAMMES OF STUDY 2007/2008
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Home : College of Science and Engineering : School of Informatics (Schedule O) : Computer Systems Organisation

Computer Design (U01900)

? Credit Points : 10  ? SCQF Level : 9  ? Acronym : INF-3-CD

This course provides an introduction to the fundamental concepts of the different ways computers can be analysed and designed, starting with the basic logic elements students are familiar with (NAND, NOR etc.). The course does not look at the differences between machines with different types of instruction set, nor does it cover design techniques for extracting maximum performance from computers - these aspects of computer hardware are covered in the Computer Architecture course. The issues and techniques covered in the Computer Design course are relevant to the design of all computers, regardless of their particular architecture.

The course is partitioned into three sections. The first section presents the design of combinational and sequential logic using a variety of design techniques and implementation methods. The second section demonstrates how to analyse and design systems of the complexity of a simple CPU or I/O controller. The third section of the course covers the design of a complete computer capable of executing assembly code programs and performing I/O.

Entry Requirements

? Pre-requisites : Successful completion of Year 2 of an Informatics Single or Combined Degree, or equivalent by permission of the School.

Variants

? This course has variants for part year visiting students, as follows

Subject Areas

Delivery Information

? Normal year taken : 3rd year

? Delivery Period : Semester 1 (Blocks 1-2)

? Contact Teaching Time : 2 hour(s) per week for 10 weeks

First Class Information

Date Start End Room Area Additional Information
20/09/2007 12:10 13:00 Room G.01, William Robertson Building Central

All of the following classes

Type Day Start End Area
Lecture Monday 12:10 13:00 Central
Lecture Thursday 12:10 13:00 Central

Summary of Intended Learning Outcomes

After successful completion of the course, students will be able to:
* Analyse and synthesise logic circuits for both combinational and sequential systems.
* Interconnect circuits for systems of higher complexity, specifically up to the complexity of the components required in a simple computer processor datapath.
* Analyse and synthesise circuits to control and sequence the flow of data within a simple cpu.
* Analyse and synthesise circuits to control and sequence the flow of data between a simple cpu, memory systems and input/output device controllers.
* Design and implement a microprogrammed controller for a given simple cpu architecture.
* Gain familiarity with: design and simulation software; designing systems with Verilog HDL; programming designs into a large field-programmable gate array device (FPGA); using an assembly language to implement a design in a programmable microcontroller.

Assessment Information

Written examination 75%
Assessed assignments 25%

Exam times

Diet Diet Month Paper Code Paper Name Length
1ST May - - 2 hour(s)
2ND August - - 2 hour(s)

Contact and Further Information

The Course Secretary should be the first point of contact for all enquiries.

Course Secretary

Mr James Bathgate
Tel : (0131 6)50 4094
Email : james.bathgate@ed.ac.uk

Course Organiser

Dr Perdita Stevens
Tel : (0131 6)50 5195
Email : perdita.stevens@ed.ac.uk

Course Website : http://www.inf.ed.ac.uk/teaching/courses/

School Website : http://www.informatics.ed.ac.uk/

College Website : http://www.scieng.ed.ac.uk/

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