![]() |
THE UNIVERSITY of EDINBURGHDEGREE REGULATIONS & PROGRAMMES OF STUDY 2007/2008
|
|
Computer Design (U01900)? Credit Points : 10 ? SCQF Level : 9 ? Acronym : INF-3-CD This course provides an introduction to the fundamental concepts of the different ways computers can be analysed and designed, starting with the basic logic elements students are familiar with (NAND, NOR etc.). The course does not look at the differences between machines with different types of instruction set, nor does it cover design techniques for extracting maximum performance from computers - these aspects of computer hardware are covered in the Computer Architecture course. The issues and techniques covered in the Computer Design course are relevant to the design of all computers, regardless of their particular architecture. Entry Requirements? Pre-requisites : Successful completion of Year 2 of an Informatics Single or Combined Degree, or equivalent by permission of the School. Variants? This course has variants for part year visiting students, as follows
Subject AreasHome subject areaComputer Systems Organisation, (School of Informatics, Schedule O) Delivery Information? Normal year taken : 3rd year ? Delivery Period : Semester 1 (Blocks 1-2) ? Contact Teaching Time : 2 hour(s) per week for 10 weeks First Class Information
All of the following classes
Summary of Intended Learning Outcomes
After successful completion of the course, students will be able to:
* Analyse and synthesise logic circuits for both combinational and sequential systems. * Interconnect circuits for systems of higher complexity, specifically up to the complexity of the components required in a simple computer processor datapath. * Analyse and synthesise circuits to control and sequence the flow of data within a simple cpu. * Analyse and synthesise circuits to control and sequence the flow of data between a simple cpu, memory systems and input/output device controllers. * Design and implement a microprogrammed controller for a given simple cpu architecture. * Gain familiarity with: design and simulation software; designing systems with Verilog HDL; programming designs into a large field-programmable gate array device (FPGA); using an assembly language to implement a design in a programmable microcontroller. Assessment Information
Written examination 75%
Assessed assignments 25% Exam times
Contact and Further InformationThe Course Secretary should be the first point of contact for all enquiries. Course Secretary Mr James Bathgate Course Organiser Dr Perdita Stevens Course Website : http://www.inf.ed.ac.uk/teaching/courses/ School Website : http://www.informatics.ed.ac.uk/ College Website : http://www.scieng.ed.ac.uk/ |
|