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THE UNIVERSITY of EDINBURGHDEGREE REGULATIONS & PROGRAMMES OF STUDY 2007/2008
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Digital Electronics 3 (U00441)? Credit Points : 20 ? SCQF Level : 9 ? Acronym : EEL-3-ELDEL Digital Circuits. Aims: To build on the material presented in the second year and enhance students understanding and design skills of combinational and sequential digital circuit design techniques. To introduce the concepts and techniques for asynchronous sequential design. Entry Requirements? Pre-requisites : Electronics 2 Electrical Engineering Methods 2 or Computer Science 1 ? Prohibited combinations : Electronics 3 Subject AreasHome subject areaElectronics, (School of Engineering and Electronics, Schedule M) Delivery Information? Normal year taken : 3rd year ? Delivery Period : Semester 1 (Blocks 1-2) ? Contact Teaching Time : 6 hour(s) 30 minutes per week for 10 weeks First Class Information
Summary of Intended Learning Outcomes
Digital Circuits: Describe the significance of logic swing, propagation delay, power supply requirements, power dissipation, fan in, fan out and be able to compare all the main logic families. Use Karnaugh maps. Implement combinational logic functions using multiplexors or decoders. Convert minimised combinational functions into a form suitable for multi-level implementation, including the use of all NAND or all NOR solutions. Minimise a combinational logic function using the Quine-McCluskey technique and find all minimum solutions using Petrick's method. Design and analyse small synchronous digital circuits which incorporate D, T or JK Flip Flops. Implement small synchronous circuit designs using discrete gates and flip-flops and programmable logic devices. Design and implement a small asynchronous circuit using gates or SR flip-flops.
Microway: Formulate algorithms, in abstract form, for the solution of problems (I/T). Analyse software timing requirements and performance (I/T). Analyse software arithmetic precision requirements (I/T). Transform algorithms into C language implementations (T). Use asynchronous scheduling techniques (interrupts and threads) in software design (T). Program simple I/O device hardware, including r/o, r/w and w/o registers, using structure mapping and bit manipulation in the C language (T). Manage software inter-process communication through queues and mailboxes (T). Assessment Information
1.5 hour Examination(50%) + Laboratory work(50%)
Exam times
Contact and Further InformationThe Course Secretary should be the first point of contact for all enquiries. Course Secretary Mr Alasdair Howie Course Organiser Dr Brian Flynn School Website : http://www.see.ed.ac.uk/ College Website : http://www.scieng.ed.ac.uk/ |
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