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DEGREE REGULATIONS & PROGRAMMES OF STUDY 2007/2008
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Home : College of Science and Engineering : School of Engineering and Electronics (Schedule M) : Electronics

Large Scale Integrated Circuits 4 (U00351)

? Credit Points : 10  ? SCQF Level : 10  ? Acronym : EEL-4-ELLSI

This course aims to equip students to enter the field of VLSI design by providing them with an understanding of the fundamental principles of digital and analogue CMOS VLSI circuit design, and the knowledge and skills required to analyse and design such circuits. Students will be introduced to some of the main CAD support tools.

Entry Requirements

? Pre-requisites : Microelectronics 3, Electronic Engineering 3

Subject Areas

Delivery Information

? Normal year taken : 4th year

? Delivery Period : Semester 1 (Blocks 1-2)

? Contact Teaching Time : 3 hour(s) per week for 9 weeks

First Class Information

Date Start End Room Area Additional Information
19/09/2007 10:00 10:50 Classroom 10, Alrick Building

All of the following classes

Type Day Start End Area
Lecture Monday 10:00 10:50 KB
Lecture Wednesday 10:00 10:50 KB
Lecture Thursday 10:00 10:50 KB

Summary of Intended Learning Outcomes

After successful completion of this course the student will
be able to:
- use IDS equations in circuit calculations;
- describe static and dynamic MOSFET circuit realisations of the main digital logic functions;
- explain CMOS latch design and synchronous system clocking;
- create scalable layout for simple digital MOS circuits;
- identify parasitic components and explain their importance for circuit modelling;
- explain simple fault modelling, test coverage and how test patterns can be produced;
- describe the main methods of design for testability;
- explain the operation & use of analog circuit building blocks;
- use large signal models to calculate and design transistor biasing;
- use small signal models to identify dominant pole, calculate gain and bandwidth and analyse transfer function for simple analog amplifiers;
- describe the main sources of noise and distortion in MOS analog circuits;
- estimate transistor noise spectral density and circuit signal to noise;
- use SPICE to simulate MOS circuits;
- describe types of analysis available in SPICE and explain level 1 MOSFET models; use SPICE to investigate the effects of variation (bias voltage, temperature, process parameter spreads) and understand their importance for circuit operation, performance and yield.

Assessment Information

Assessment is based on a single examination paper of 90 minutes duration.

Exam times

Diet Diet Month Paper Code Paper Name Length
1ST December 1 - 1 hour(s) 30 minutes

Contact and Further Information

The Course Secretary should be the first point of contact for all enquiries.

Course Secretary

Mrs Laura Smith
Tel : (0131 6)50 5690
Email : laura.smith@ed.ac.uk

Course Organiser

Dr Peter Ewen
Tel : (0131 6)50 5651
Email : Peter.Ewen@ed.ac.uk

School Website : http://www.see.ed.ac.uk/

College Website : http://www.scieng.ed.ac.uk/

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