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DEGREE REGULATIONS & PROGRAMMES OF STUDY 2006/2007
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Home : College of Science and Engineering : School of Engineering and Electronics (Schedule M) : Electronics

Digital Electronics 3 (U00441)

? Credit Points : 20  ? SCQF Level : 9  ? Acronym : EEL-3-ELDEL

Digital Circuits. Aims: To build on the material presented in the second year and enhance students understanding and design skills of combinational and sequential digital circuit design techniques. To introduce the concepts and techniques for asynchronous sequential design.

Microway: Microway aims to inculcate structured approaches to analysis, synthesis and testing, in an environment where the scale of the problem is beyond the scope of the constrained resources of any individual in the team. Hence, personal and team organisation is essential in achieving a satisfactory outcome. A general appreciation of issues in control loop stability, inter; machine communication and human-computer interaction is conveyed, through the prima facie requirements of the project.

Assessments are designed to reward good application and execution of method, despite difficulties in short term outcome. Final goal assessment is based on a multiplicity of alternative intermediate goals, enabling a range of team abilities to be assessed as satisfactory, despite differing outcomes; while still maintaining uniform requirements for the use of structured technical and managerial organisation.

Entry Requirements

? Pre-requisites : Electronics 2 Electrical Engineering Methods 2 or Computer Science 1

? Prohibited combinations : Mobile Communications and Multimedia Engineering 3 Electrical and Mechanical Engineering 3

Subject Areas

Delivery Information

? Normal year taken : 3rd year

? Delivery Period : Semester 1 (Blocks 1-2)

? Contact Teaching Time : 6 hour(s) 30 minutes per week for 10 weeks

First Class Information

Date Start End Room Area Additional Information
19/09/2006 12:00 13:00 Seminar Room 715, Swann Building KB

Summary of Intended Learning Outcomes

Digital Circuits: Describe the significance of logic swing, propagation delay, power supply requirements, power dissipation, fan in, fan out and be able to compare all the main logic families. Use Karnaugh maps. Implement combinational logic functions using multiplexors or decoders. Convert minimised combinational functions into a form suitable for multi-level implementation, including the use of all NAND or all NOR solutions. Minimise a combinational logic function using the Quine-McCluskey technique and find all minimum solutions using Petrick's method. Design and analyse small synchronous digital circuits which incorporate D, T or JK Flip Flops. Implement small synchronous circuit designs using discrete gates and flip-flops and programmable logic devices. Design and implement a small asynchronous circuit using gates or SR flip-flops.

Microway: Formulate algorithms, in abstract form, for the solution of problems (I/T). Analyse software timing requirements and performance (I/T). Analyse software arithmetic precision requirements (I/T). Transform algorithms into C language implementations (T). Use asynchronous scheduling techniques (interrupts and threads) in software design (T). Program simple I/O device hardware, including r/o, r/w and w/o registers, using structure mapping and bit manipulation in the C language (T). Manage software inter-process communication through queues and mailboxes (T).

Assessment Information

1.5 hour Examination(50%) + Laboratory work(50%)

Exam times

Diet Diet Month Paper Code Paper Name Length
1ST December 1 - 1 hour(s) 30 minutes
2ND August 1 - 1 hour(s) 30 minutes

Contact and Further Information

The Course Secretary should be the first point of contact for all enquiries.

Course Secretary

Mrs Sian Gowans
Tel : (0131 6)50 5687
Email : Sian.Gowans@ed.ac.uk

Course Organiser

Dr Brian Flynn
Tel : (0131 6)50 5590
Email : Brian.Flynn@ed.ac.uk

School Website : http://www.see.ed.ac.uk/

College Website : http://www.scieng.ed.ac.uk/

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