Digital System Design 4 (U00374)

? Credit Points : 10 ? SCQF Level : 10 ? Acronym : EEL-4-ELDSD

This course presents students with a selection of important issues in, and approaches to, the systematic design of large scale digital machines. It stresses the need for structured approaches to all scales of digital machine design and compares design and implementation techniques which facilitate this. The emphasis is on design for correct operation. Optimisation is addressed, focusing on the identification of the appropriate parameter for optimisation, and the relation of this to the structure of the design. The role of the designer is presented as one of identifying tradeoffs and choosing structures and subsystem requirements appropriate to the design objectives of the system. Recurrent themes, such as synchronisation, data coding and the management of propagation delay, are used to illustrate similarities and differences in problem analysis and solution, at differing scales of complexity.

Entry Requirements

? Pre-requisites : Electronics 2 or Digital Electronics 3 or Electrical and Mechanical Engineering 3

Subject Areas

Home subject area

Electronics, (School of Engineering and Electronics, Schedule M)

Delivery Information

? Normal year taken : 4th year

? Delivery Period : Semester 2 (Blocks 3-4)

? Contact Teaching Time : 3 hour(s) per week for 9 weeks

All of the following classes

Type	Day	Start	End	Area
Lecture	Monday	14:00	14:50	KB
Lecture	Thursday	14:00	14:50	KB
Lecture	Friday	14:00	14:50	KB

Summary of Intended Learning Outcomes

After successful completion of this course a student will be able to:
- synthesise and analyse reliable small scale clocked and unclocked state machines;
- explain the problems of synchronisation of small scale state machines with similar and dissimilar clocking;
- identify and apply handshake criteria to the synchronisation of small and large scale state machines;
- describe the features of iterative solutions and utilise single and multi-dimensional iteration in logic circuit and firmware design;
- explain the control-data paradigm in system architecture and analyse and synthesise datapath circuits, sequencer circuits and sequencer firmware;
- explain issues in multi-factorial optimisation;
- describe specific circuit and firmware structures, and design approaches, to facilitate a range of optimisations in system design;
- describe the fundamental circuit structures of bus communication sub-systems, and their characteristics;
- analyse the basic properties of simple synchronous and asynchronous system bus structures.